Wrong TRIS set on Uart1_Init.

[MAN]

Hi ME's

The TRIS bit for TX on P18f1220 seem not properly set.
See bellow:

Code: Select all

0x0080	0x8AAC      	BSF         TXSTA, 5 
;__Lib_UART_b14.mpas,42 :: 		
0x0082	0x0E90      	MOVLW       144
0x0084	0x6EAB      	MOVWF       RCSTA 
;__Lib_UART_b14.mpas,43 :: 		
0x0086	0x8893      	BSF         TRISB4_bit, 4 
;__Lib_UART_b14.mpas,44 :: 		
0x0088	0x8293      	BSF         TRISB1_bit, 1     <---- here 

[filip]

Hi,

From the 18F1220 datasheet :

The RB1/AN5/TX/CK/INT1 and RB4/AN6/RX/DT/KBI0 pins must be configured as follows for use with the Universal Synchronous Asynchronous Receiver Transmitter:
• SPEN (RCSTA<7>) bit must be set ( = 1),
• PCFG6:PCFG5 (ADCON1<5:6>) must be set ( = 1),
• TRISB<4> bit must be set ( = 1) and
• TRISB<1> bit must be set ( = 1).

Regards,
Filip.

[MAN]

Hi Filip,
excuse by delay, and thank's by reply ,yes i see this but the datasheet of p18f4550 say:

The pins of the Enhanced USART are multiplexed
with PORTC. In order to configure RC6/TX/CK and
RC7/RX/DT/SDO as an EUSART:
• SPEN bit (RCSTA<7>) must be set (= 1)
• TRISC<7> bit must be set (= 1)
• TRISC<6> bit must be set (= 1)

and the Uart1_init generate the code:

Code: Select all

0x006C	0x0E90      	MOVLW       144
0x006E	0x6EAB      	MOVWF       RCSTA 
;__Lib_UART_c67.mpas,43 :: 		
0x0070	0x8E94      	BSF         TRISC7_bit, 7 
;__Lib_UART_c67.mpas,44 :: 		
0x0072	0x9C94      	BCF         TRISC6_bit, 6  <------ here

One or another not is in sync.

Best Regards.