Trouble with external interrupt declariation

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jeff188: Posts: 30; Joined: 23 Feb 2015 07:16

Trouble with external interrupt declariation

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#1 Post by jeff188 » 01 Mar 2015 10:29

I've got a switch tied to pin E7 on a ATMEGA128. PORTE is the port with the external interrupt capability. The pin works fine as an input+pullup for polled use. However, when I enable "INT7_bit" - the pin acts like an output (the switch on this pin may cause the AVR to restart).

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DDE7_bit = 0; // ENC 1-SW input
PORTE7_bit = 1; // enable pull up on ENC inputs

If I use the pin as a polled-type of input, it works fine (the switch closure grounding E7 is detected). For example...

if (PINE7==0) {...

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But when I enable the pin for external interrupter

INT7_bit = 1; // enable external IRQ on SW <----- this is the line causing trouble.

In this case, the same switch closure on E7 results in a bad reaction by the AVR (high current drain).

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I must be overlooking something simple. Or perhaps INT7_bit is the incorrect way to enable the external interrupt service on pin E7. But I have been thorough the Atmel documentation on external inputs and it seems this should be correct.

Appreciate any suggestion...

jeff188: Posts: 30; Joined: 23 Feb 2015 07:16

Re: Trouble with external interrupt declariation

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#2 Post by jeff188 » 01 Mar 2015 21:35

UPDATE - PARTIAL SOLUTION

This problem only occurs with ISCn0 = 0 **and** ISCn1 = 0. That is the correct configuration for a LOW LEVEL trigger. However, that does not work.

If you have either of these pins set to 1, then this problem goes away and the IRQ triggers fine. Only in the 0/0 case does the problem show. I have no explanation for that however.

Here's the description from the EIMSK table right out of the Atmel datasheet.

ISCn1 ISCn0 Description
----------------------------------------------------------------------------
0 0 The low level of INTn generates an interrupt request.
0 1 Any logical change on INTn generates an interrupt request
1 0 The falling edge between two samples of INTn generates an interrupt request.
1 1 The rising edge between two samples of INTn generates an interrupt