ver 8.3 - fix for P18 RETFIE silicon bug?

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Malcolm_M
Posts: 184
Joined: 12 May 2007 13:01
Location: Bristol, UK

ver 8.3 - fix for P18 RETFIE silicon bug?

#1 Post by Malcolm_M » 24 Jul 2008 20:02

Is there a way to make the compiler use RETFIE , 0 ?

http://www.mikroe.com/forum/viewtopic.php?t=14724

Very pleased to see compiler uses hardware multiply for PIC18 - thanks.

janni
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Joined: 18 Feb 2006 13:17
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#2 Post by janni » 25 Jul 2008 00:24

Hi,

In version 8.3 the low priority interrupt ends with RETFIE 0 :) . No need for doing it manually any longer (and RETFIE 0 is coded correctly, when used in assembly). Also FSR registers are saved into registers separate from the ones used in high priority interrupt.

CALL xxx, FAST is also coded properly, if one uses CALL xxx, 1 (for some reason, FAST, though defined as 1, is compiled as it was 0).

maylenne23
Posts: 2
Joined: 02 Oct 2009 04:27

#3 Post by maylenne23 » 02 Oct 2009 04:30

Hi There!
This is Maylenne!
Im new in this site!

In version 8.3 the low priority interrupt ends with RETFIE 0 Smile . No need for doing it manually any longer (and RETFIE 0 is coded correctly, when used in assembly). Also FSR registers are saved into registers separate from the ones used in high priority interrupt.
Thanks!...
Have a nice Day to all!....



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