Power-on delay with PIC555

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RachelAnne
Posts: 4
Joined: 07 Jul 2021 03:44

Power-on delay with PIC555

#1 Post by RachelAnne » 29 Sep 2021 03:51

I am trying to create a power-on delay with a 555 PIC ( datasheet). I have never used one of these before and I am finding it a bit tricky to make applications with it - a lot going on.

I found this circuit online
Image
My question is in relation to the power-on delay circuit (first picture) above. Initially, the 100uF capacitor is fully discharged (0V) , so doesn't that mean that the trigger pin will be low (less than 1/3 Vcc) and thus the flip flop will get set high and thus cause the output to go high -> defeating the entire purpose?

Secondly, how is it possible to measure the 100uF capacitor voltage from the negative terminal, wouldn't that always be 0V?

Is it just me or are these circuits hard to understand at first?

gfaman
Posts: 3
Joined: 11 Feb 2021 09:38

Re: Power-on delay with PIC555

#2 Post by gfaman » 08 Oct 2021 08:26

Hi,
NE555 is just a timer, one of the most famous ever exist (1972) like the AOP 741...
This schematic is quite unusual but it is a monostable one. Usually capacitor and resistor are inverted. However, as you want to have 0v during a certain time (1.1RC) then 1, it should work as it is like that.
At first, yes, capacitor is discharged so trigger (2) and threshold (6) are high, making reset on the flip-flop. Reset means Q' is 1 and after inversion (internal inverter) it is 0 on the output.
After the capacitor is charged, trigger is low, making set to the flip-flop, so Q' is low and output become high.
Never try this configuration but it should work.

Laurent

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