Not enough ROM space with OrgAll

[Dany]

Hi,

Code: Select all

program Empty2;

{ Declarations section }

begin
  { Main program }
  OrgAll(0x9D000000);
end.

How is it possible that the (almost) empty program above generates a "not enough ROM space" error? I use mP for PIC32 3.6.0.
The error is not there when I leave out the OrgAll statement. In that case the code starts (of course) at address $9D000000.

The config file:

Code: Select all

<?xml version="1.0"?>
<MCU_DEVICE_FLAGS>
  <DEVICE>
    <DEVICE_NAME>P32MX795F512L</DEVICE_NAME>
    <VALUE>
      <COUNT>4</COUNT>
      <VALUE0>
        <VAL>$1FC02FF0:$C7070000</VAL>
      </VALUE0>
      <VALUE1>
        <VAL>$1FC02FF4:$8751</VAL>
      </VALUE1>
      <VALUE2>
        <VAL>$1FC02FF8:$94C5A3</VAL>
      </VALUE2>
      <VALUE3>
        <VAL>$1FC02FFC:$110FF00F</VAL>
      </VALUE3>
    </VALUE>
  </DEVICE>
</MCU_DEVICE_FLAGS>

Translated config file:

Code: Select all

ProjectFileName: C:\Users\Public\Documents\Mikroelektronika\mikroPascal PRO for PIC32\Examples\Other\USB HID Bootloader\Projects\PIC32MX250F128B\Empty2

MCU Name  : P32MX795F512L
MCU clock : 10000000
Crystal   : -.-- Mhz
Ext Clock : -.-- Mhz

DEVCFG3: $1FC02FF0:$C7070000
SRS Select (FSRSSEL)                                  : SRS Priority 7 (= "111")
Ethernet RMII/MII Enable (FMIIEN)                     : Enabled (= "1")
Ethernet I/O Pin Select (FETHIO)                      : Enabled (= "1")
CAN I/O Pin Select (FCANIO)                           : Enabled (= "1")
USB USID Selection (FUSBIDIO)                         : Enabled (= "1")
USB VBUS ON Selection (FVBUSONIO)                     : Enabled (= "1")

DEVCFG2: $1FC02FF4:$8751
PLL Input Divider (FPLLIDIV)                          : 2x Divider (= "001")
PLL Multiplier (FPLLMUL)                              : 20x Multiplier (= "101")
USB PLL Input Divider (UPLLIDIV)                      : 12x Divider (= "111")
USB PLL Enable (UPLLEN)                               : Disabled (= "1")
System PLL Output Clock Divider (FPLLODIV)            : PLL Divide by 1 (= "000")

DEVCFG1: $1FC02FF8:$94C5A3
Oscillator Selection Bits (FNOSC)                     : Primary Osc w/PLL (XT+,HS+,EC+PLL) (= "011")
Secondary Oscillator Enable (FSOSCEN)                 : Enabled (= "1")
Internal/External Switch Over (IESO)                  : Enabled (= "1")
Primary Oscillator Configuration (POSCMOD)            : XT osc mode (= "01")
CLKO Output Signal Active on the OSCO Pin (OSCIOFNC)  : Disabled (= "1")
Peripheral Clock Divisor (FPBDIV)                     : Pb_Clk is Sys_Clk/1 (= "00")
Clock Switching and Monitor Selection (FCKSM)         : Clock Switch Disable, FSCM Disabled (= "11")
Watchdog Timer Postscaler (WDTPS)                     : 1:1048576 (= "10100")
Watchdog Timer Enable (FWDTEN)                        : Enabled (= "1")

DEVCFG0: $1FC02FFC:$110FF00F
Background Debugger Enable (DEBUG)                    : Disabled (= "11")
JTAG Enable (RESERVED1)                               : JTAG Port Enabled (= "1")
ICE/ICD Comm Channel Select (ICESEL)                  : ICE EMUC2/EMUD2 pins shared with PGC2/PGD2 (= "1")
Program Flash Write Protect (PWP)                     : Disabled (= "11111111")
Boot Flash Write Protect bit (BWP)                    : Disabled (= "1")
Code Protect (CP)                                     : Disabled (= "1")

Thanks in advance!

[Dany]

Am I the only one in this case?

Added: This post is partly related to this one: viewtopic.php?f=164&t=66186&start=15

[filip]

Hi,

I will take a look at this and let you know.

Regards,
Filip.