I'm using STM32Plus evaluation board and I tried to configure pin PA8 in alternate mode function (MCO1) selecting as reference clock the HSE clock (25MHz). Monitoring the signal by mean an oscilloscope I see a clock of 25MHz with Dutycyle of 50% but with an amplitude of about 1.2V. This is very strange because I should see a clock with an amplitude of 3.3V. Seem that the GPIO PA8 in Alternate function mode source power supply from internal regulator of MCu instead from 3.3V VDD power supply.
I tried to configure PC9 pin in AF mode sending as reference clock HSE to verify the behavior and I always seen a 1.2V clock signal.
The board power supply is provided by mean USB port.
Why? Do you have any suggestions?
Following my config code:
Code: Select all
/* Output clock on MCO2 pin(PC9) ****************************************/
/* Enable the GPIOC peripheral */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_MCO);
/* Configure MCO2 pin(PC9) in alternate function */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_Init(GPIOC, &GPIO_InitStructure);
/* System clock selected to output on MCO2 pin(PC9)*/
//RCC_MCO2Config(RCC_MCO2Source_SYSCLK, RCC_MCO2Div_2);
RCC_MCO2Config(RCC_MCO2Source_HSE, RCC_MCO2Div_1);
/*Enable or disable the AHB1 peripheral clock */
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_MCO);
/*Configure GPIO pin */
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
//GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(GPIOA, &GPIO_InitStructure);
/* System clock selected to output on MCO1 pin(PA8)*/
RCC_MCO1Config(RCC_MCO1Source_PLLCLK, RCC_MCO1Div_2);