Hi,
I'm using DSPIC33EP5121MU810 processor.
SPI pins of the processor which.
And how the use?
Can you give examples of software?
Ismail SORAN
R&D Engineering
TURKEY/ANK.
DSPIC33EP512MU810 SPI Problem..!
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- Posts: 8
- Joined: 18 Jun 2014 11:59
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Re: DSPIC33EP512MU810 SPI Problem..!
Hi,
this is a test program for a custom board, but I hope is a good example . It sends 8 16-bit packets in an SPI transaction (active CS).
And here are the PIC settings generated using Dany's Project configuration tool http://www.libstock.com/projects/view/9 ... ne-version
this is a test program for a custom board, but I hope is a good example . It sends 8 16-bit packets in an SPI transaction (active CS).
Code: Select all
{ Declarations section }
var
LED0: sbit at LATF.5;
LED1: sbit at LATF.4;
LED2: sbit at LATD.15;
LED3: sbit at LATD.14;
CS: sbit at LATG.9;
Ch0, Ch1, Ch2, Ch3: Word;
Ch4, Ch21, Ch20, Ch8: Word;
procedure SetOSC;
begin
//PLLPRE := 0;
CLKDIV.4 := 0;
CLKDIV.3 := 0;
CLKDIV.2 := 0;
CLKDIV.1 := 0;
CLKDIV.0 := 0;
//PLLPOST := 0;
CLKDIV.7 := 0;
CLKDIV.6 := 0;
//PLLDIV := 68
PLLFBD := 68;
end;
procedure SetUSBOsc;
begin
//use primary oscillator - 8MHz
ACLKCON3.ASRCSEL := 1; //1= Primary Oscillator is the clock source for APLL
ACLKCON3.FRCSEL := 0; //0= Auxiliary Oscillator or Primary Oscillator is the clock source for APLL (determined by ASRCSEL bit)
ACLKCON3.SELACLK := 1; //1= Auxiliary PLL or oscillator provides the source clock for auxiliary clock divider
//APLLPOST := 6 //110= Divided by 2
ACLKCON3.7 := 1;
ACLKCON3.6 := 1;
ACLKCON3.5 := 0;
//APLLPRE := 1 = N1 //001= Divided by 2 => FAREF = 4MHz (input to APLL)
ACLKCON3.2 := 0;
ACLKCON3.1 := 0;
ACLKCON3.0 := 1;
//FAVCO must be 96MHz (output from APLL)
//FAVCO = FAIN * M / N1 = 8MHz * M / 2 = 4MHz * M
//M = 24 => FAVCO = 4MHz * 24 = 96MHz
ACLKDIV3 := 7; //111= 24
ACLKCON3.ENAPLL := 1; //1= APLL is enabled, the USB clock source is the APLL output
end;
begin
Delay_ms(100);
SetOSC;
SetUSBOsc;
TRISF.5 := 0;
TRISF.4 := 0;
TRISD.15 := 0;
TRISD.14 := 0;
TRISG.9 := 0; //CS
TRISG.6 := 0; //SCK
TRISG.8 := 0; //SDO
LED0 := not LED0;
LED1 := not LED1;
LED2 := not LED2;
LED3 := not LED3;
Delay_ms(200);
LED0 := not LED0;
LED1 := not LED1;
LED2 := not LED2;
LED3 := not LED3;
Delay_ms(200);
LED0 := not LED0;
LED1 := not LED1;
LED2 := not LED2;
LED3 := not LED3;
Delay_ms(200);
LED0 := not LED0;
LED1 := not LED1;
LED2 := not LED2;
LED3 := not LED3;
//Delay_ms(200);
CS := 1;
SPI2_Init_Advanced(_SPI_MASTER, _SPI_16_BIT, _SPI_PRESCALE_SEC_1, _SPI_PRESCALE_PRI_1, _SPI_SS_DISABLE, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_IDLE_2_ACTIVE);
ADC1_Init; //TAD = 32*Tcy
//TAD = 12*Tcy
AD1CON3.7 := 0;
AD1CON3.6 := 0;
AD1CON3.5 := 0;
AD1CON3.4 := 1;
AD1CON3.3 := 0;
AD1CON3.2 := 1;
AD1CON3.1 := 1;
{repeat
LED0 := not LED0;
LED1 := not LED1;
LED2 := not LED2;
LED3 := not LED3;
Delay_ms(500);
until False; }
repeat
Ch0 := ADC1_Get_Sample(0);
Ch1 := ADC1_Get_Sample(1);
Ch2 := ADC1_Get_Sample(2);
Ch3 := ADC1_Get_Sample(3);
Ch4 := ADC1_Get_Sample(4);
Ch21 := ADC1_Get_Sample(21);
Ch20 := ADC1_Get_Sample(20);
Ch8 := ADC1_Get_Sample(8);
CS := 0;
SPI2_Write(Ch0);
SPI2_Write(Ch1);
SPI2_Write(Ch2);
SPI2_Write(Ch3);
SPI2_Write(Ch4);
SPI2_Write(Ch21);
SPI2_Write(Ch20);
SPI2_Write(Ch8);
CS := 1;
until False;
end.
Code: Select all
MCU Name : P33EP512MU810
FGS: $F80004:$0003
General Segment Write-Protect bit (GWRP) : Disabled (= "1")
General Segment Code-Protect bit (GSS) : Disabled (= "1")
General Segment Key bits (GSSK) : Disabled (= "00")
FOSCSEL: $F80006:$0003
Initial Oscillator Source Selection Bits (FNOSC) : Primary Oscillator (XT, HS, EC) with PLL (= "011")
Two-speed Oscillator Start-up (IESO) : Disabled (= "0")
FOSC: $F80008:$00A5
Primary Oscillator Mode (POSCMD) : XT Crystal Oscillator Mode (= "01")
OSC2 Pin Function (OSCIOFNC) : OSC2 is clock output (= "1")
Peripheral pin select configuration (IOL1WAY) : Allow only one reconfiguration (= "1")
Clock Switching Modes (FCKSM) : Both Clock switching and Fail-safe Clock Monitor are disabled (= "10")
FWDT: $F8000A:$007F
Watchdog Timer Postscaler Bits (WDTPOST) : 1:32,768 (= "1111")
Watchdog Timer Prescaler bit (WDTPRE) : 1:128 (= "1")
PLL Lock Wait (PLLKEN) : Enabled (= "1")
Watchdog Timer Window (WINDIS) : Disabled (= "1")
Watchdog Timer (FWDTEN) : Disabled (= "0")
FPOR: $F8000C:$003F
Power-on Reset Timer Value (FPWRT) : 128ms (= "111")
Brown-out Reset (BOR) Detection (BOREN) : Enabled (= "1")
Alternate I2C pins for I2C1 (ALTI2C1) : Disabled (= "1")
Alternate I2C pins for I2C2 (ALTI2C2) : Disabled (= "1")
FICD: $F8000E:$00D7
ICD Communication Channel (ICS) : Communicate on PGEC1 and PGED1 (= "11")
Reset Target Vector (RSTPRI) : Device will obtain reset instruction from Primary flash (= "1")
... (ATMOD8) : Disabled (= "1")
JTAG (JTAGEN) : Disabled (= "0")
Debugger/Emulation Enable Bit (COE) : Enabled (= "1")
Background Debug (BACKBUG) : Disabled (= "1")
FAS: $F80010:$0003
Auxiliary Segment Write-protect bit (AWRP) : Disabled (= "1")
Auxiliary Segment Code-protect bit (APL) : Disabled (= "1")
Auxiliary Segment Key bits (APLK) : Disabled (= "00")