Code: Select all
#define DPOT_CMD__WRITE_RVAL 0b0001
void main() {
TRISB = 0x41b4;
SPI1_Init();
SPI1_Init_Advanced(_SPI_MASTER, _SPI_16_BIT, _SPI_PRESCALE_SEC_1, _SPI_PRESCALE_PRI_1, _SPI_SS_DISABLE, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_ACTIVE_2_IDLE);
while(1)
{
SPI1_Write((DPOT_CMD__WRITE_RVAL << 10) | (0x3ff & 0b0101010101));
Delay_us(100);
}
Code: Select all
#define DPOT_CMD__WRITE_RVAL 0b0001
unsigned int data_to_send = 0x55;
oid main() {
TRISB = 0x41b4;
SPI1_Init();
SPI1_Init_Advanced(_SPI_MASTER, _SPI_16_BIT, _SPI_PRESCALE_SEC_1, _SPI_PRESCALE_PRI_1, _SPI_SS_DISABLE, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_ACTIVE_2_IDLE);
// ***************** ADDED THESE *******************
FRMEN_bit = 1;
SPIFSD_bit = 0;
SPIFPOL_bit = 0;
SPIFE_bit = 0;
// **************************************************
while(1)
{
SPI1_Write((DPOT_CMD__WRITE_RVAL << 10) | (0x3ff & data_to_send);
Delay_us(100);
}
So, I tried the following:
Code: Select all
#define DPOT_CMD__WRITE_RVAL 0b0001
unsigned int data_to_send = 0x55;
void main() {
TRISB = 0x41b4;
SPI1_Init();
SPI1_Init_Advanced(_SPI_MASTER, _SPI_16_BIT, _SPI_PRESCALE_SEC_1, _SPI_PRESCALE_PRI_1, _SPI_SS_DISABLE, _SPI_DATA_SAMPLE_MIDDLE, _SPI_CLK_IDLE_LOW, _SPI_ACTIVE_2_IDLE);
// ********************** ADDED THIS ************************
SPI1CON2 = 0x8001; // bit15: Framed SPI support enabled, etc.
// ***********************************************************
while(1)
{
SPI1_Write((DPOT_CMD__WRITE_RVAL << 10) | (0x3ff & data_to_send));
Delay_us(100);
}
Still NO SYNC pulse!
I had to do THIS to get Framed SDI to work on SDI1:
Code: Select all
#define DPOT_CMD__WRITE_RVAL 0b0001
unsigned int data_to_send = 0x55;
unsigned int temp; // A place to put the SDI read that, apparently, is necessary to make this work.
void main() {
TRISB = 0x41b4;
SPI1CON1 = 0x04bb;
SPI1CON2 = 0xa001; // Framing enabled, Sync pulse as Master, Sync pulse Polarity = 1,
SPI1STAT = 0xa000; // Enable SPI1
while(1)
{
SPI1BUF = (DPOT_CMD__WRITE_RVAL << 10) | (0x3ff & data_to_send );
while (SPI1STAT & 0x0002)
{
;
}
// Some sort of delay need here, because all this detects is when the shift register is loaded from the
// the SPI Buffer. Or, there is an interrupt [SPI1IE: SPI1 Transfer Complete] that looks like it might do the trick-- but I didn't try it.
// Also, instead of reading the SPI1BUF, it looks like all I really had to do was Clear the SPIROV bit.
temp = SPI1BUF;
}
}
SOOOOO... my wish is that you guys do the following:
1. Change the FRMEN_bit, SPIFSD_bit , etc defines so they have a SDI1 and SDI2 context in cases where the PIC has two (or more) SID modules. Something like FRMEN1_bit & FRMEN2_bit.
2. Add Framed SDI capability to the SPIx_Init_Advanced() function, or add a separate function for setting this up.